Generally, the conventional chip carriers have improper joints. Please refer to FIG. 1 which is a sectional view of a conventional chip carrier with a ball grid array (BGA) substrate. There are a chip 11 disposed on one side of the substrate 13 and packaged by a case 1. A plurality of balls are disposed on the other side of the substrate 13. FIG. 2 shows one kind of the conventional chip carrier in which the grounded balls 21 are disposed on the central area of the substrate 24. The power balls 22 and the signal balls 23 indiscriminately surround outside the grounded ball 21 by a space. With this messy layout of the power balls 22 and the signal balls 23, the conducting lines for connecting these balls to the chip on the first side of the substrate 24 are long and ineffective. Besides, the long conducting lines will cause a high resistance/inductance/capacitance (R/L/C) value which is very harmful to the transmission of signals.
FIG. 3 shows another kind of the conventional chip carrier with a BGA substrate. The grounded balls 31 and the power balls 32 are disposed on the central area of one side of the substrate 34 and the signal balls 33 surround them. Both of the grounded balls 31 and the power balls 32 are disposed a on half of the central area right under the chip on the other side, respectively. When the chip is under the operating condition, a great amount of heat will be generated from the chip, resulting in that the power balls 32 for energizing the chip are not workable under high temperature. This thermal effect may make the chip out of function. Moreover, because of the grounded balls, power balls, and signal balls are located together, there is a big chance to make the different balls touch each other under improper treatment the chip carrier. In these two kinds of BGA substrate of a chip carrier, it is an uneasy task to manufacture different balls in the same area when the space between each ball is getting smaller and smaller. If any two of the different balls touch each other, there will be a short-circuit generated in the chip.